1. Field of the Invention
The present invention relates to a multithread processor and a method of synchronization operations to be used in the multithread processor and particularly to the synchronization operations among threads in the multithread processor.
2. Description of the Related Art
In the multithread processor, a program is divided, in a single process, into execution units each being called a thread which are executed in parallel. To perform this process, a plurality of threads shares memory space. Therefore, when the plurality of threads handles shared data, data contention occurs in some cases and, in order to prevent the occurrence of the data contention, synchronization operations among threads (exclusive operation in which, while a thread handles shared data, any other thread is not allowed to handle the shared data) are performed. FIGS. 2 to 4 show conventional synchronization operations among threads.
In FIG. 2, the CPU (Central Processing Unit) 101 is executing a program in an instruction area 105 specified by the Thread 102. The thread 102 sets a synchronization word 106 and its initial value to “1” (other than “0”) so that the thread 102 is synchronized with the Target 103.
When the execution of the thread 102 reaches the CHK (Check) instruction step in the instruction area 105, the synchronization word 106 is referred to and, if its value is other than 0, the thread 102 is changed from an R (Runnable) state to a S (Suspend) state and is connected to the Thread Queue 108 to which all threads being executed in the system are connected.
When the execution by the CPU 101 progresses, as shown in FIG. 3, the Target 103 is loaded into the CPU 101 and is executed. In the instruction area of the Target 103 exists the LAC (Load and Clear) instruction which is used to inform of the completion of synchronization with the thread 102 and, when this instruction is executed, the value of the synchronization word 106 is changed from “1” to “0”.
Moreover, when the execution by the CPU 101 progresses, as shown in FIG. 4, the Thread 102 is again loaded and executed and the execution again starts from the CHK instruction and, since the synchronization word 106 is “0” this time, subsequent instructions are successively executed. Thus, the synchronization among threads can be realized. Data is received and passed according to a method determined separately.
General systems of the multithread processor are disclosed in “Sun Niagara and an Evaluation of SMT in IBM's Power 5” (John Mellor—Crummey, Department of Computer Science Rice University, COMP 522 Lecture 4 7 Sep. 2006).